SM

Shiv Harit Mathur

ST Sandisk Technologies: 17 patents #169 of 2,224Top 8%
WT Western Digital Technologies: 6 patents #532 of 3,180Top 20%
SN Stmicroelectronics International N.V.: 1 patents #346 of 696Top 50%
Overall (All Time): #166,273 of 4,157,543Top 4%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12367160 System and method for valid window maximization in toggle mode link using systematic skew addition to compensate for SSO and crosstalk Niravkumar Patel 2025-07-22
12191854 PPA improvement for voltage mode driver and on-die termination (ODT) Nirav Patel, SAI RAVI TEJA KONAKALLA 2025-01-07
11984168 High speed toggle mode transmitter with capacitive boosting Nitin Gupta, Ramakrishnan Subramanian, Dmitry Vaysman 2024-05-14
11916549 Two-stage high speed level shifter SAI RAVI TEJA KONAKALLA 2024-02-27
11803207 Reference independent and noise insensitive glitch free clock multiplexer Avinash Pandit 2023-10-31
11539207 Snapback electrostatic discharge protection for electronic circuits Nitin Gupta 2022-12-27
11424716 Dual voltage high speed receiver with toggle mode Ashish Savadia, Tejaswini K 2022-08-23
11222889 Electrostatic discharge protection circuit Ramakrishnan Subramanian 2022-01-11
11210241 High-level output voltage training for non-volatile memory Nitin Gupta, Ashish Savadia, Jayanth Mysore Thimmaiah, Ramakrishnan Subramanian, Rampraveen Somasundaram +4 more 2021-12-28
11056880 Snapback electrostatic discharge protection for electronic circuits Nitin Gupta 2021-07-06
10878860 Multi-level signaling scheme for memory interface Nitin Gupta, Ramakrishnan Subramanian 2020-12-29
10861508 Transmitting DBI over strobe in nonvolatile memory Nitin Gupta, Ramakrishnan Subramanian 2020-12-08
10838901 System and method for a reconfigurable controller bridge chip Vijay Chinchole, Siva Raghu Ram Voleti, Nitin Gupta, Ramakrishnan Subramanian, Yan Li +1 more 2020-11-17
10727825 Circuits for optimizing skew and duty cycle distortion between two signals 2020-07-28
10673434 Auto-corrected IO driver architecture Anand Sharma 2020-06-02
10637446 Dual voltage range CMOS receiver 2020-04-28
10348276 Loop delay optimization for multi-voltage self-synchronous systems 2019-07-09
10224928 On-die impedance calibration Ramakrishnan Subramanian, Nitin Gupta 2019-03-05
10134728 ESD centric low-cost IO layout design topology Anand Sharma, Lakhdar Iguelmamene, Richard J K Hong, Rajeswara Rao Bandaru 2018-11-20
9996655 Skeleton I/O generation for early ESD analysis Anand Sharma, Rajeswara Rao Bandaru 2018-06-12
9859874 Loop delay optimization for multi-voltage self-synchronous systems 2018-01-02
9524799 Method and apparatus to tune a toggle mode interface Sateesh Desireddi, Srinivasa Rao Sabbineni 2016-12-20
9240787 Wide supply range high speed low-to-high level shifter 2016-01-19
8564332 Automatic clock-activity based chip/IO ring design—a novel architecture to reduce standby consumption 2013-10-22