Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 10424358 | Bias control circuit with distributed architecture for memory cells | Supraja Sundaresan, Sung-En Wang, Khin Htoo | 2019-09-24 | $190,000 |
| 10284182 | Duty cycle correction scheme for complementary signals | Venkatesh Ramachandra, Tianyu Tang, Srinivas Rajendra | 2019-05-07 | |
| 9792994 | Bulk modulation scheme to reduce I/O pin capacitance | Venkatesh Ramachandra | 2017-10-17 |