Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12411728 | NAND fast cyclic redundancy check | — | 2025-09-09 |
| 12367915 | Fast reference voltage training for I/O interface | — | 2025-07-22 |
| 12322453 | NAND IO bandwidth increase | Venkatesh Ramachandra, Siddhesh Darne | 2025-06-03 |
| 12283341 | Dynamic clock mask based on read data for power saving | — | 2025-04-22 |
| 12057189 | Chip select, command, and address encoding | Siddhesh Darne, Venkatesh Ramachandra | 2024-08-06 |
| 11901905 | Receiver side setup and hold calibration | — | 2024-02-13 |
| 11398287 | Input/output circuit internal loopback | Venkatesh Ramachandra | 2022-07-26 |
| 11328295 | Secure messaging-based delayed payout mediation with protective countermeasures | Jasmine Ni Xu, Thilak Thenpandyian, Ming-Li Kathy Koh, Justin Edgar Berot-Burns, Kaneeka Arora Agarwal +3 more | 2022-05-10 |
| 11184007 | Cycle borrowing counter | Venkatesh Ramachandra | 2021-11-23 |
| 11081193 | Inverter based delay chain for calibrating data signal to a clock | — | 2021-08-03 |
| 10587247 | Duty cycle and vox correction for complementary signals | Venkatesh Ramachandra, Srinivas Rajendra | 2020-03-10 |
| 10530347 | Receiver-side setup and hold time calibration for source synchronous systems | Venkatesh Ramachandra | 2020-01-07 |
| 10528255 | Interface for non-volatile memory | Jiwang Lee, Anil Pai, Ravindra Arjun Madpur, Amandeep Kaur, Ragul Kumar Krishnan +1 more | 2020-01-07 |
| 10447247 | Duty cycle correction on an interval-by-interval basis | Venkatesh Ramachandra | 2019-10-15 |
| 10284182 | Duty cycle correction scheme for complementary signals | Primit Modi, Venkatesh Ramachandra, Srinivas Rajendra | 2019-05-07 |
| 9673798 | Digital pulse width detection based duty cycle correction | Venkatesh Ramachandra, Srinivas Rajendra | 2017-06-06 |