Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9941192 | Semiconductor device having repairable penetration electrode | Sungsoo Chung | 2018-04-10 |
| 6018815 | Adaptable scan chains for debugging and manufacturing test purposes | — | 2000-01-25 |
| 5917832 | Self-test circuit and method utilizing interlaced scanning for testing a semiconductor memory device | Dongsoon Yi | 1999-06-29 |
| 5812562 | Low cost emulation scheme implemented via clock control using JTAG controller in a scan environment | — | 1998-09-22 |
| 5805608 | Clock generation for testing of integrated circuits | Edward H. Yu | 1998-09-08 |
| 5793776 | Structure and method for SDRAM dynamic self refresh entry and exit using JTAG | Amjad Qureshi | 1998-08-11 |
| 5519713 | Integrated circuit having clock-line control and method for testing same | William A. Rogers | 1996-05-21 |