Issued Patents All Time
Showing 1–25 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9817434 | Memory system controlling peak current generation for a plurality of memories by synchronizing internal clock of each memory with a processor clock at different times to avoid peak current generation period overlapping | Bo-Geun Kim, Jae-Yong Jeong, Seung Hun Choi, Seok-Cheon Kwon, Chul-Ho Lee | 2017-11-14 |
| 9261940 | Memory system controlling peak current generation for a plurality of memories by monitoring a peak signal to synchronize an internal clock of each memory by a processor clock at different times | Bo-Geun Kim, Jae-Yong Jeong, Seung Hun Choi, Seok-Cheon Kwon, Chul-Ho Lee | 2016-02-16 |
| RE45378 | Method for receiving data | — | 2015-02-17 |
| RE45366 | Method of writing data to a memory | — | 2015-02-10 |
| 8729615 | Non-volatile memory device with high speed operation and lower power consumption | Chang-Hyun Lee, Young Woo Park, CHEON AN LEE, Sung-Il Chang, Chul Bum Kim | 2014-05-20 |
| RE44618 | Devices and methods for controlling active termination resistors in a memory system | — | 2013-12-03 |
| 8477546 | Semiconductor memory devices having redundancy arrays | — | 2013-07-02 |
| RE44064 | Semiconductor memory device and module for high frequency operation | — | 2013-03-12 |
| 8120976 | Line defect detection circuit for detecting weak line | Eunsung Seo | 2012-02-21 |
| 7961018 | Semiconductor device including delay locked loop having periodically activated replica path | Seok-Hun Hyun, Jun Ho SHIN | 2011-06-14 |
| 7894260 | Synchronous semiconductor memory device having on-die termination circuit and on-die termination method | Dong Jin Lee, Chang-sik Yoo | 2011-02-22 |
| 7804720 | Integrated circuit memory devices including mode registers set using a data input/output bus | Kee-hoon Lee, Chang-sik Yoo | 2010-09-28 |
| 7787283 | Devices and methods for controlling active termination resistors in a memory system | — | 2010-08-31 |
| 7765442 | Memory device testable without using data and dataless test method | — | 2010-07-27 |
| 7679975 | Semiconductor memory devices having redundancy arrays | — | 2010-03-16 |
| 7636273 | Integrated circuit memory devices that support selective mode register set commands | Kee-hoon Lee, Chang-sik Yoo | 2009-12-22 |
| 7616473 | Devices and methods for controlling active termination resistors in a memory system | — | 2009-11-10 |
| 7539826 | System, device, and method for improved mirror mode operation of a semiconductor memory device | Moo Sung Chae | 2009-05-26 |
| 7477067 | Semiconductor integrated circuit which can be burn-in-tested even when packaged and method of burn-in-testing semiconductor integrated circuit even when the semiconductor integrated circuit is packaged | — | 2009-01-13 |
| 7457192 | Semiconductor memory device and module for high frequency operation | — | 2008-11-25 |
| 7457189 | Integrated circuit memory devices that support selective mode register set commands and related methods | Kee-hoon Lee, Chang-sik Yoo | 2008-11-25 |
| 7447084 | Semiconductor memory device and method of supplying wordline voltage thereof | Nak-Won Heo | 2008-11-04 |
| 7426145 | Synchronous semiconductor memory device having on-die termination circuit and on-die termination method | Dong Jin Lee, Chang-sik Yoo | 2008-09-16 |
| 7369445 | Methods of operating memory systems including memory devices set to different operating modes and related systems | Kee-hoon Lee, Chang-sik Yoo | 2008-05-06 |
| 7313715 | Memory system having stub bus configuration | Chang-sik Yoo, Byung-Se So | 2007-12-25 |