Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12106794 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2024-10-01 |
| 12033686 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2024-07-09 |
| 12020767 | Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device | Dae-Sik Moon, Kyung-Soo Ha, Young-Soo Sohn, Ki-Seok Oh, Chang-Kyo Lee +2 more | 2024-06-25 |
| 11749337 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2023-09-05 |
| 11749338 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2023-09-05 |
| 11423971 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2022-08-23 |
| 11393522 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2022-07-19 |
| 11244926 | Semiconductor package and manufacturing method thereof | Young-Hoon Son, Jung-Hwan Choi | 2022-02-08 |
| 11211102 | Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device | Dae-Sik Moon, Kyung-Soo Ha, Young-Soo Sohn, Ki-Seok Oh, Chang-Kyo Lee +2 more | 2021-12-28 |
| 10923175 | Memory device adjusting duty cycle and memory system having the same | Dae-Sik Moon, Gil-Hoon Cha, Ki-Seok Oh, Chang-Kyo Lee, Yeon-Kyu Choi +2 more | 2021-02-16 |
| 10885950 | Method and memory system for optimizing on-die termination settings of multi-ranks in a multi-rank memory device | Dae-Sik Moon, Kyung-Soo Ha, Young-Soo Sohn, Ki-Seok Oh, Chang-Kyo Lee +2 more | 2021-01-05 |
| 10763242 | Semiconductor package and method of manufacturing the same | Young-Hoon Son, Jung-Hwan Choi | 2020-09-01 |
| 10643675 | Memory device determining operation mode based on external voltage and method of operating the same | Jin-Seok Heo, Joung-Wook Moon, Ki-Ho Kim, Jin-Hyeok Baek | 2020-05-05 |
| 10566968 | Output driver, and semiconductor memory device and memory system having the same | Young-Hoon Son, Jung-Hwan Choi | 2020-02-18 |
| 9830960 | Data output circuit and memory device including the same | Chang-Kyo Lee, Won Young Lee, Bo-bae Shin, Jung-Hwan Choi, Yong-Cheol Bae +1 more | 2017-11-28 |
| 9466393 | Semiconductor device capable of rescuing defective characteristics occurring after packaging | Jeong Kyoum KIM, Jung-Hwan Choi, Seong-Jin Jang | 2016-10-11 |
| 9312963 | Optical transmission converter, memory system comprising same, and related method of operation | Jeong Kyoum KIM, In-Dal Song, Seong-Jin Jang, Jung-Hwan Choi | 2016-04-12 |
| 9269457 | Semiconductor device capable of rescuing defective characteristics occurring after packaging | Jeong Kyoum KIM, Jung-Hwan Choi, Seong-Jin Jang | 2016-02-23 |
| 9245605 | Clock synchronization circuit and semiconductor memory device including clock synchronization circuit | Seong-Hwan Jeon, Yang-Ki Kim, Jung-Hwan Choi | 2016-01-26 |
| 9065455 | Delay locked loop circuit and semiconductor memory device including the same | Tae-Sik Na | 2015-06-23 |
| 8049545 | Delay-locked loop circuit controlled by column strobe write latency | Yang-Ki Kim | 2011-11-01 |
| 7961018 | Semiconductor device including delay locked loop having periodically activated replica path | Kye-hyun Kyung, Jun Ho SHIN | 2011-06-14 |