Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12212645 | Reset synchronizing circuit and glitchless clock buffer circuit for preventing start-up failure, and IQ divider circuit | Vishnu Kalyanamahadevi Gopalan Jawarlal, Kang Jik Kim, Hyo Gyuem Rhew, Jae Hyun Park | 2025-01-28 |
| 12068752 | Digital loop filter of low latency and low operation and clock data recovery circuit including the same | Sunggeun Kim, Hyeonju Lee, Seuk Son, Kangjik Kim, Jaehyun Park | 2024-08-20 |
| 11804945 | Reset synchronizing circuit and glitchless clock buffer circuit for preventing start-up failure, and IQ divider circuit | Vishnu Kalyanamahadevi Gopalan Jawarlal, Kang Jik Kim, Hyo Gyuem Rhew, Jae Hyun Park | 2023-10-31 |
| 11740270 | Pattern generator and built-in-self test device including the same | Hanseok Kim, Jiyoung Kim, Jaehyun Park, Hyeonju Lee, Kangjik Kim +4 more | 2023-08-29 |
| 10861395 | Display device having a scan driver including a plurality of stages and signal lines arranged in a stair pattern | Sunji Moon, Soonhwan Hong | 2020-12-08 |
| 10783848 | Display device subpixel activation patterns | JongBeom Lee, Beumsik Cho | 2020-09-22 |
| 10593278 | Display device subpixel activation patterns | JongBeom Lee, Beumsik Cho | 2020-03-17 |