Issued Patents All Time
Showing 51–71 of 71 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7033895 | Method of fabricating a MOS transistor with elevated source/drain structure using a selective epitaxial growth process | Seung Hwan Lee, Moon-han Park, Ho-Jin Lee, Jae-Yoon Yoo | 2006-04-25 |
| 6987310 | Multi-layered structure including an epitaxial layer having a low dislocation defect density, semiconductor device comprising the same, and method of fabricating the semiconductor device | Ho Sang Lee, Moon-han Park, Jae-Yoon Yoo, Seung Hwan Lee | 2006-01-17 |
| 6917085 | Semiconductor transistor using L-shaped spacer | Geum-Jong Bae, Nae-In Lee, Young-Gun Ko, Tae-Hee Choe, Sang-Su Kim | 2005-07-12 |
| 6914301 | CMOS integrated circuit devices and substrates having buried silicon germanium layers therein and methods of forming same | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Nae-In Lee, Kyung Wook Lee | 2005-07-05 |
| 6884705 | Semiconductor device having hetero grain stack gate and method of forming the same | Nae-In Lee, Jung-Il Lee, Sang-Su Kim, Bae Geum Jong | 2005-04-26 |
| 6881621 | Method of fabricating SOI substrate having an etch stop layer, and method of fabricating SOI integrated circuit using the same | Tae-Hee Choe, Nae-In Lee, Geum-Jong Bae, Sang-Su Kim | 2005-04-19 |
| 6881650 | Method for forming SOI substrate | Jung-Il Lee, Kazuyuki Fujihara, Nae-In Lee, Geum-Jong Bae, Sang-Su Kim | 2005-04-19 |
| 6878580 | Semiconductor device having gate with negative slope and method for manufacturing the same | Geum-Jong Bae, Nae-In Lee, Ki-Chul Kim, Sang-Su Kim, Jung-Il Lee | 2005-04-12 |
| 6815320 | Method for fabricating semiconductor device including gate spacer | Sang-Su Kim, Geum-Jong Bae, Ki-Chul Kim, Jung-Il Lee | 2004-11-09 |
| 6806517 | Flash memory having local SONOS structure using notched gate and manufacturing method thereof | Sang-Su Kim, Nae-In Lee, Geum-Jong Bae, Ki-Chul Kim | 2004-10-19 |
| 6794306 | Semiconductor device having gate all around type transistor and method of forming the same | Sang-Su Kim, Tae-Hee Choe, Geum-Jong Bae, Nae-In Lee | 2004-09-21 |
| 6750532 | CMOS semiconductor device and method of manufacturing the same | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Nae-In Lee | 2004-06-15 |
| 6716689 | MOS transistor having a T-shaped gate electrode and method for fabricating the same | Geum-Jong Bae, Nae-In Lee, Sang-Su Kim, Jung-Il Lee | 2004-04-06 |
| 6696328 | CMOS gate electrode using selective growth and a fabrication method thereof | Geum-Jong Bae, Sang-Su Kim, Jung-Il Lee, Young-Ki Ha, Ki-Chul Kim | 2004-02-24 |
| 6693013 | Semiconductor transistor using L-shaped spacer and method of fabricating the same | Geum-Jong Bae, Nae-In Lee, Young-Gun Ko, Tae-Hee Choe, Sang-Su Kim | 2004-02-17 |
| 6670677 | SOI substrate having an etch stop layer and an SOI integrated circuit fabricated thereon | Tae-Hee Choe, Nae-In Lee, Geum-Jong Bae, Sang-Su Kim | 2003-12-30 |
| 6667525 | Semiconductor device having hetero grain stack gate | Nae-In Lee, Jung-Il Lee, Sang-Su Kim, Bae Geum Jong | 2003-12-23 |
| 6633066 | CMOS integrated circuit devices and substrates having unstrained silicon active layers | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Nae-In Lee, Kyung Wook Lee | 2003-10-14 |
| 6605847 | Semiconductor device having gate all around type transistor and method of forming the same | Sang-Su Kim, Tae-Hee Choe, Geum-Jong Bae, Nae-In Lee | 2003-08-12 |
| 6524902 | Method of manufacturing CMOS semiconductor device | Geum-Jong Bae, Tae-Hee Choe, Sang-Su Kim, Nae-In Lee | 2003-02-25 |
| 6518645 | SOI-type semiconductor device and method of forming the same | Geum-Jong Bae, Sang-Su Kim, Tae-Hee Choe | 2003-02-11 |