Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10192592 | Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features | Lee-Lean Shu, Paul M-Bhor Chiang, Soon Kyu PARK | 2019-01-29 |
| 9384822 | Systems and methods involving data bus inversion memory circuitry, configuration and/or operation including data signals grouped into 10 bits and/or other features | Lee-Lean Shu, Paul M-Bhor Chiang, Soon Kyu PARK | 2016-07-05 |
| 6225854 | Voltage boosting circuit having cross-coupled precharge circuits | — | 2001-05-01 |
| 6172931 | Semiconductor memory device with a multi-bank structure | Kyu-Nam Lim | 2001-01-09 |
| 6118722 | Integrated circuit memory device | Jun-Young Jeon, Sang Jae Lee | 2000-09-12 |
| 6018485 | Semiconductor memory device with cascaded burn-in test capability | Jae-Youn Youn | 2000-01-25 |
| 5940343 | Memory sub-word line driver operated by unboosted voltage | Jei-Hwan Yoo, Hoon Choi | 1999-08-17 |
| 5881004 | Burn-in stress control circuit for a semiconductor memory device | — | 1999-03-09 |
| 5812483 | Integrated circuit memory devices including split word lines and predecoders and related methods | Jun-Young Jeon, Sang Jae Lee | 1998-09-22 |
| 5723993 | Pulse generating circuit for use in a semiconductor memory device | — | 1998-03-03 |
| 5495452 | Circuit for controlling a self-refresh period in a semiconductor memory device | — | 1996-02-27 |