Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12376226 | Printed circuit board mesh routing to reduce solder ball joint failure during reflow | Benito Joseph Rodriguez, Shu-Ming Chang, Po-Chun Yang, Juan-Yi Wu | 2025-07-29 |
| 11212912 | Printed circuit board mesh routing to reduce solder ball joint failure during reflow | Benito Joseph Rodriguez, Shu-Ming Chang, Po-Chun Yang, Juan-Yi Wu | 2021-12-28 |
| 11086546 | Preserve write for solid-state drives | Vamsi Sata | 2021-08-10 |
| 10379769 | Continuous adaptive calibration for flash memory devices | Aniryudh Reddy Durgam, Haritha Uppalapati | 2019-08-13 |
| 10289348 | Tapered variable node memory | Jake Bear, Majid Nemati Anaraki | 2019-05-14 |
| 9838033 | Encoder supporting multiple code rates and code lengths | Jake Bear | 2017-12-05 |
| 9417961 | Resource allocation and deallocation for power management in devices | James V. Henson, Bhasker R. Jakka | 2016-08-16 |
| 9378132 | System and method for scanning flash memories | Hadi Torabi PARIZI, Namhoon Yoo, Umang Thakkar | 2016-06-28 |
| 9223373 | Power arbitration for storage devices | Umang Thakkar, Amir Alavi, Lun Bin Huang | 2015-12-29 |
| 8566667 | Low density parity check code decoding system and method | Xinde Hu, Levente Peter Jakab, Rohit Komatineni | 2013-10-22 |
| 8527849 | High speed hard LDPC decoder | Levente Peter Jakab | 2013-09-03 |
| 8379339 | Closely coupled vector sequencers for a read channel pipeline | Sivagnanam Parthasarathy, Alessandro Risso | 2013-02-19 |
| 8347200 | Reduced memory multi-channel parallel encoder system | Bhasker R. Jakka | 2013-01-01 |
| 7370136 | Efficient and flexible sequencing of data processing units extending VLIW architecture | — | 2008-05-06 |