Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11581037 | Digital compute-in-memory (DCIM) bit cell circuit layouts and DCIM arrays for multiple operations per column | Xiaonan Chen, Zhongze Wang, Mustafa Badaroglu | 2023-02-14 |
| 11500960 | Memory cell for dot product operation in compute-in-memory chip | Zhongze Wang, Ye Lu, Xiaochun Zhu, Xia Li | 2022-11-15 |
| 11469239 | Static random-access memory (SRAM) array circuits including bilateral well tap cells with reduced width folded finger structure | Channappa Desai, Sunil Sharma, Anne Srikanth, Pradeep Jayadev Kodlipet | 2022-10-11 |
| 11424250 | Memory | Kalyan Kumar Oruganti, Sreeram Gurram, Venkata Balakrishna Reddy Thumu, Pradeep Jayadev Kodlipet, Diwakar SINGH +3 more | 2022-08-23 |
| 11361817 | Pseudo-triple-port SRAM bitcell architecture | Arun Babu Pallerla, Changho Jung, Sung Son, Jason Michael Cheng, Chulmin Jung +1 more | 2022-06-14 |
| 10964356 | Compute-in-memory bit cell | Zhongze Wang, Xia Li, Ye Lu | 2021-03-30 |
| 10964380 | Integrated device comprising memory bitcells comprising shared preload line and shared activation line | Zhongze Wang, Xia Li, Ye Lu, Xiaochun Zhu, Xiaonan Chen | 2021-03-30 |
| 10438654 | Transpose static random access memory (SRAM) bit cells configured for horizontal and vertical read operations | Xia Li | 2019-10-08 |