Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11881862 | Mitigation of duty-cycle distortion | Udayakiran Kumar Yallamaraju, Xia Li, Pankaj Deshmukh, Vajram Ghantasala, Bin Yang +4 more | 2024-01-23 |
| 11327525 | Clock monitoring unit with serial clock routing pipeline | Federico Salluzzo, Sina Dena, Amod Phadke | 2022-05-10 |