Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
MP

Mohit Kishore Prasad

Qualcomm: 19 patents #1,160 of 12,104Top 10%
ATAT&T: 12 patents #1,455 of 18,772Top 8%
Sony: 8 patents #5,352 of 25,231Top 25%
AGAgere Systems Guardian: 3 patents #85 of 810Top 15%
FSFreeescale Semiconductor: 3 patents #982 of 3,767Top 30%
IBM: 1 patents #44,794 of 70,183Top 65%
ASAgere Systems: 1 patents #984 of 1,849Top 55%
San Diego, CA: #798 of 23,606 inventorsTop 4%
California: #10,163 of 386,348 inventorsTop 3%
Overall (All Time): #70,199 of 4,157,543Top 2%
43 Patents All Time

Issued Patents All Time

Showing 26–43 of 43 patents

Patent #TitleCo-InventorsDate
6553517 Interleavers and de-interleavers 2003-04-22
6434163 Transverse correlator structure for a rake receiver John Fernando 2002-08-13
6377618 Auto-correlation system and method for rate detection of a data communication channel Mark E. Warner 2002-04-23
6324205 Scalable method for generating long codes using gold sequences 2001-11-27
6295287 Reverse-link interleaving for communication systems based on closed-form expressions 2001-09-25
6209014 Look-ahead LMS technique 2001-03-27
6198732 Forward-link traffic/paging-channel interleaving for communication systems based on closed-form expressions 2001-03-06
6198733 Forward-link sync-channel interleaving/de-interleaving for communication systems based on closed-form expressions 2001-03-06
6195344 Forward-link traffic/paging-channel de-interleaving for communication systems based on closed-form expressions 2001-02-27
6185200 Reverse-link de-interleaving for communication systems based on closed-form expressions 2001-02-06
6064712 Autoreload loop counter Marc Stephen Diamondstein 2000-05-16
6049858 Modulo address generator with precomputed comparison and correction terms Ravi Kolagotla 2000-04-11
6047364 True modulo addressing generator Ravi Kolagotla 2000-04-04
5983333 High speed module address generator Ravi Kolagotla 1999-11-09
5941940 Digital signal processor architecture optimized for performing fast Fourier Transforms Hosahalli R. Srinivas 1999-08-24
5913052 System and method for debugging digital signal processor software with an architectural view and general purpose computer employing the same Paul E. Beatty, Paul D'Arcy, Lee E. Deschler 1999-06-15
5541943 Watchdog timer lock-up prevention circuit Richard J. Niescier 1996-07-30
5274569 Dual sense non-differencing digital peak detector 1993-12-28