Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12181963 | Robust circuitry for passive fundamental components | Yi-Hung Tseng, Charles J. Persico, Mustafa Keskin | 2024-12-31 |
| 12040785 | Robust transistor circuitry | Yi-Hung Tseng, Charles J. Persico | 2024-07-16 |
| 12015415 | High gain low power phase detector and loop filter for phase lock loop (PLL) | Sungmin Ock | 2024-06-18 |
| 10707854 | Clock screening with programmable counter-based clock interface and time-to-digital converter with high resolution and wide range operation | Zhengzheng Wu, Deping Huang, Jeffrey Mark Hinrichs | 2020-07-07 |
| 10553531 | Process-invariant resistor and capacitor pair | Chao Song, Xuhao Huang | 2020-02-04 |
| 10520901 | Clock screening with programmable counter-based clock interface and time-to-digital converter with high resolution and wide range operation | Zhengzheng Wu, Deping Huang, Jeffrey Mark Hinrichs | 2019-12-31 |
| 9634676 | Circuits and methods providing clock frequency adjustment in response to supply voltage changes | Ashok Swaminathan, Christian Venerus | 2017-04-25 |
| 9602113 | Fast frequency throttling and re-locking technique for phase-locked loops | Ian Galton | 2017-03-21 |
| 9437278 | Low latency synchronization scheme for mesochronous DDR system | Edwin Jose, Michael Drop, Xuhao Huang, Raghu Sankuratri, Deepti Vijayalakshmi Sriramagiri | 2016-09-06 |
| 9123408 | Low latency synchronization scheme for mesochronous DDR system | Edwin Jose, Michael Drop, Xuhao Huang, Raghu Sankuratri, Deepti Vijayalakshmi Sriramagiri | 2015-09-01 |
| 8742815 | Temperature-independent oscillators and delay elements | Sameer Wadhwa | 2014-06-03 |
| 8669794 | Circuit for detecting a voltage change using a time-to-digital converter | Sang Wook Park, Ashwin Raghunathan | 2014-03-11 |
| 8570108 | Injection-locking a slave oscillator to a master oscillator with no frequency overshoot | Ashwin Ragunathan, Sameer Wadhwa | 2013-10-29 |
| 8380138 | Duty cycle correction circuitry | Sameer Wadhwa | 2013-02-19 |
| 8362848 | Supply-regulated VCO architecture | Ashwin Raghunathan, Sameer Wadhwa | 2013-01-29 |
| 8330511 | PLL charge pump with reduced coupling to bias nodes | Ashwin Raghunathan, Sameer Wadhwa | 2012-12-11 |
| 8164369 | Techniques for minimizing control voltage noise due to charge pump leakage in phase locked loop circuits | Ashwin Raghunathan | 2012-04-24 |
| 8159888 | Recalibration systems and techniques for electronic memory applications | Ashwin Raghunathan | 2012-04-17 |
| 8143957 | Current-mode gain-splitting dual-path VCO | Xiaohong Quan | 2012-03-27 |
| 8120409 | Programmable delay circuit with integer and fractional time resolution | Mustafa Keskin | 2012-02-21 |
| 7973612 | Supply-regulated phase-locked loop (PLL) and method of using | Ashwin Raghunathan | 2011-07-05 |
| 7940100 | Delay circuits matching delays of synchronous circuits | Mustafa Keskin | 2011-05-10 |
| 7932757 | Techniques for minimizing control voltage ripple due to charge pump leakage in phase locked loop circuits | Ashwin Raghunathan | 2011-04-26 |
| 7880554 | Periodic timing jitter reduction in oscillatory systems | Ashwin Raghunathan | 2011-02-01 |
| 7724092 | Dual-path current amplifier | Xiaohong Quan | 2010-05-25 |