Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8266409 | Configurable cache and method to configure same | Ajay Anant Ingle, Lucian Codrescu, Jian Shen | 2012-09-11 |
| 8260990 | Selective preclusion of a bus access request | Lucian Codrescu, Ajay Anant Ingle, Erich James Plondke | 2012-09-04 |
| 8234319 | System and method of performing two's complement operations in a digital signal processor | Shankar Krithivasan | 2012-07-31 |
| 7809783 | Booth multiplier with enhanced reduction tree circuitry | Shankar Krithivasan | 2010-10-05 |
| 7801164 | Two dimensional timeout table mechanism with optimized delay characteristics | Ali A. Poursepanj, David P. Sonnier | 2010-09-21 |
| 7797366 | Power-efficient sign extension for booth multiplication methods and systems | Shankar Krithivasan, William C. Anderson | 2010-09-14 |
| 7584233 | System and method of counting leading zeros and counting leading ones in a digital signal processor | Jian Liang | 2009-09-01 |
| 7313089 | Method and apparatus for switching between active and standby switch fabrics with no loss of data | Hanan Moller, David P. Sonnier | 2007-12-25 |
| 7111289 | Method for implementing dual link list structure to enable fast link-list pointer updates | David P. Sonnier | 2006-09-19 |
| 6801991 | Method and apparatus for buffer partitioning without loss of data | Hanan Moller, David P. Sonnier | 2004-10-05 |
| 6668313 | Memory system for increased bandwidth | David P. Sonnier | 2003-12-23 |
| 6252600 | Computer graphics system with dual FIFO interface | Ashu Kohli, Thomas Lanzoni, James A. Pafumi, William Alan Wall, Jeffrey A. Whaley | 2001-06-26 |