Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12355596 | Adaptive channel equalization for a duo-binary transceiver | — | 2025-07-08 |
| 12212327 | Phase-locked loops (PLL), including time-to-digital converter (TDC) gain calibration circuits and related methods | Ping-Hung Lu, Minhan Chen | 2025-01-28 |
| 11722140 | Phase-locked-loop circuit employing a hybrid loop filter with sample and hold capacitors for reduced signal jitter, and related methods | Ping-Hung Lu, Charles W. Boecker | 2023-08-08 |
| 11705890 | Programmable analog calibration circuit supporting iterative measurement of an input signal from a measured circuit, such as for calibration, and related methods | Anirban Banerjee, Charles W. Boecker, Eric D. Groen | 2023-07-18 |
| 11658696 | Network transceiver with VGA channel specific equalization | — | 2023-05-23 |
| 10965442 | Low-power, low-latency time-to-digital-converter-based serial link | Eskinder Hailu, Jon Boyette, Hadi Goudarzi, Yong Suk Jun, Zhi Zhu +1 more | 2021-03-30 |
| 10476434 | Quadrature clock generation with injection locking | Zhuo Gao, Eskinder Hailu | 2019-11-12 |
| 10419204 | Serializer-deserializer with frequency doubler | Eskinder Hailu, Zhuo Gao | 2019-09-17 |
| 10389366 | SerDes with adaptive clock data recovery | Eskinder Hailu, Jon Boyette | 2019-08-20 |
| 10355701 | Apparatus and method for frequency calibration of voltage controlled oscillator (VCO) including determining VCO frequency range | Eskinder Hailu, Zhuo Gao | 2019-07-16 |
| 10355702 | Hybrid phase-locked loop | Zhuo Gao, Eskinder Hailu | 2019-07-16 |
| 9998126 | Delay locked loop (DLL) employing pulse to digital converter (PDC) for calibration | Eskinder Hailu | 2018-06-12 |
| 9971312 | Pulse to digital converter | Eskinder Hailu | 2018-05-15 |
| 9778672 | Gate boosted low drop regulator | Zhuo Gao | 2017-10-03 |
| 9729163 | Apparatus and method for in situ analog signal diagnostic and debugging with calibrated analog-to-digital converter | Deqiang Song, Xiaohua Kong, Zhuo Gao | 2017-08-08 |
| 9602317 | Apparatus and method for combining currents from passive equalizer in sense amplifier | Eskinder Hailu, Hanan Cohen | 2017-03-21 |
| 9577646 | Fractional phase locked loop (PLL) architecture | Hanan Cohen, Eskinder Hailu, Kenneth Luis Arcudia | 2017-02-21 |
| 9520872 | Linear equalizer with variable gain | — | 2016-12-13 |
| 9485085 | Phase locked loop (PLL) architecture | Kenneth Luis Arcudia, Jeffrey Andrew Shafer | 2016-11-01 |