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Load matching for a current-steering digital-to-analog converter |
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2025-08-26 |
| 12362761 |
Digital-to-analog converter (DAC) with dynamic stacked cascode switches |
Xiahan Zhou, Haibo Fei, Nitz Saputra |
2025-07-15 |
| 12348606 |
Clock frequency deviation detector with closed-loop calibration |
Bo Pang, Matthew Chauncey Kusbit, Mahmoud Mohamed Rashad Ibrahim Elhebeary, Benjamin Griffitts, Xiaohong Quan |
2025-07-01 |
| 12261612 |
Compact frequency-locked loop architecture for digital clocking |
John Abcarius, Debesh Bhatta, Robert M. Ondris, Wenjing Yin |
2025-03-25 |
| 12228956 |
Low headroom cascode bias circuit for cascode current mirrors |
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2025-02-18 |
| 11728822 |
Digital amplitude tracking current steering digital-to-analog converter |
Shahin Mehdizad Taleie, Dongwon Seo, Ashok Swaminathan, Gurkanwal Singh Sahota, Haibo Fei |
2023-08-15 |
| 11271576 |
Digital-to-analog converter (DAC) with common-mode correction |
Ashok Swaminathan, Siyu Yang |
2022-03-08 |
| 10958279 |
Partitioned digital-to-analog converter system |
Debesh Bhatta, Kevin Jia-Nong Wang, Karthik Nagarajan, John Abcarius, Christian Venerus +1 more |
2021-03-23 |
| 10840929 |
Digital-to-analog converter (DAC) with common-mode correction |
Jaswinder Singh, Debesh Bhatta, Haibo Fei |
2020-11-17 |
| 10516412 |
Image calibration for time-interleaved digital-to-analog converter |
Shahin Mehdizad Taleie, Ashok Swaminathan, Sudharsan Kanagaraj, Negar Rashidi, Siyu Yang +5 more |
2019-12-24 |
| 10461768 |
Digital-to-analog converter (DAC) design with reduced settling time |
Zongyu Dong, Dongwon Seo |
2019-10-29 |
| 10454487 |
Segmented resistor architecture for digital-to-analog converters |
Behnam Sedighi, Nitz Saputra |
2019-10-22 |
| 7525836 |
Non-imprinting memory with high speed erase |
Robert M. Backus, Charles F. Duffey, Swati V. Joshi |
2009-04-28 |
| 7379325 |
Non-imprinting memory with high speed erase |
Robert M. Backus, Charles F. Duffey, Swati V. Joshi |
2008-05-27 |