Issued Patents All Time
Showing 26–50 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11063021 | Microelectronics package with vertically stacked dies | Robert Aigner, Gernot Fattinger, Dirk Robert Walter Leipold, George Maxim, Baker Scott +2 more | 2021-07-13 |
| 10985033 | Semiconductor package with reduced parasitic coupling effects and process for making the same | George Maxim, Dirk Robert Walter Leipold, Baker Scott | 2021-04-20 |
| 10964554 | Wafer-level fan-out package with enhanced performance | Jonathan Hale Hammond | 2021-03-30 |
| 10882740 | Wafer-level package with enhanced performance and manufacturing method thereof | Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond | 2021-01-05 |
| 10804246 | Microelectronics package with vertically stacked dies | Robert Aigner, Gernot Fattinger, Dirk Robert Walter Leipold, George Maxim, Baker Scott +2 more | 2020-10-13 |
| 10804179 | Wafer-level package with enhanced performance | Jan Edward Vandemeer, Jonathan Hale Hammond, Merrill Albert Hatcher, Jr., Jon Chadwick | 2020-10-13 |
| 10790216 | Thermally enhanced semiconductor package and process for making the same | Robert Aigner | 2020-09-29 |
| 10784233 | Microelectronics package with self-aligned stacked-die assembly | George Maxim | 2020-09-22 |
| 10784149 | Air-cavity module with enhanced device isolation | George Maxim, Dirk Robert Walter Leipold, Baker Scott | 2020-09-22 |
| 10773952 | Wafer-level package with enhanced performance | Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond | 2020-09-15 |
| 10770802 | Antenna on a device assembly | Alexander Wayne Hietala | 2020-09-08 |
| 10759660 | Method for processing product wafers using carrier substrates | Jonathan Hale Hammond, Jan Edward Vandemeer | 2020-09-01 |
| 10755992 | Wafer-level packaging for enhanced performance | Merrill Albert Hatcher, Jr., Peter V. Wright, Jon Chadwick | 2020-08-25 |
| 10749518 | Stacked field-effect transistor switch | George Maxim, Dirk Robert Walter Leipold, Marcus Granger-Jones, Baker Scott | 2020-08-18 |
| 10622309 | Transmission line structure with high Q factor and low insertion loss for millimeter wave applications | George Maxim, Dirk Robert Walter Leipold, Baker Scott, Danny Chang | 2020-04-14 |
| 10486963 | Wafer-level package with enhanced performance | Merrill Albert Hatcher, Jr., Jonathan Hale Hammond, Jon Chadwick, Jan Edward Vandemeer | 2019-11-26 |
| 10486965 | Wafer-level package with enhanced performance | Jan Edward Vandemeer, Jonathan Hale Hammond | 2019-11-26 |
| 10492301 | Method for manufacturing an integrated circuit package | George Maxim, Dirk Robert Walter Leipold, Baker Scott | 2019-11-26 |
| 10490471 | Wafer-level packaging for enhanced performance | Merrill Albert Hatcher, Jr., Peter V. Wright, Jon Chadwick | 2019-11-26 |
| 10468329 | Thermally enhanced semiconductor package having field effect transistors with back-gate feature | George Maxim, Dirk Robert Walter Leipold, Baker Scott | 2019-11-05 |
| 10366972 | Microelectronics package with self-aligned stacked-die assembly | George Maxim | 2019-07-30 |
| 10276495 | Backside semiconductor die trimming | George Maxim, Dirk Robert Walter Leipold, Baker Scott | 2019-04-30 |
| 10262915 | Thermally enhanced semiconductor package with thermal additive and process for making the same | George Maxim, Dirk Robert Walter Leipold, Baker Scott, Merrill Albert Hatcher, Jr., Stephen Mobley | 2019-04-16 |
| 10199301 | Methods of manufacturing a printed circuit module having a semiconductor device with a protective layer in place of a low-resistivity handle layer | Dirk Robert Walter Leipold, George Maxim, Baker Scott | 2019-02-05 |
| 10134627 | Silicon-on-plastic semiconductor device with interfacial adhesion layer | — | 2018-11-20 |