SW

Simon Edward Willard

PS Psemi: 53 patents #5 of 166Top 4%
PS Peregrine Semiconductor: 5 patents #29 of 112Top 30%
MC Murata Manufacturing Co.: 3 patents #2,166 of 5,295Top 45%
TI Texas Instruments: 1 patents #7,357 of 12,488Top 60%
📍 San Diego, CA: #498 of 23,606 inventorsTop 3%
🗺 California: #5,467 of 386,348 inventorsTop 2%
Overall (All Time): #36,219 of 4,157,543Top 1%
62
Patents All Time

Issued Patents All Time

Showing 51–62 of 62 patents

Patent #TitleCo-InventorsDate
10319854 High voltage switching device Abhijeet Paul, Alain Duvallet 2019-06-11
10276371 Managed substrate effects for stabilized SOI FETs Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta 2019-04-30
10236872 AC coupling modules for bias ladders Tero Tapio Ranta 2019-03-19
10192884 Butted body contact for SOI transistor 2019-01-29
10147740 Methods and structures for reducing back gate effect in a semiconductor device Buddhika Abesingha, Alain Duvallet, Merlin Green, Sivakumar KUMARASAMY 2018-12-04
10115787 Low leakage FET Abhijeet Paul, Alain Duvallet 2018-10-30
9882531 Body tie optimization for stacked transistor amplifier Chris Olson, Tero Tapio Ranta 2018-01-30
9847348 Systems, methods and apparatus for enabling high voltage circuits Buddhika Abesingha, Alain Duvallet, Merlin Green, Sivakumar KUMARASAMY 2017-12-19
9843293 Gate drivers for stacked transistor amplifiers Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff 2017-12-12
9842858 Butted body contact for SOI transistor 2017-12-12
9837412 S-contact for SOI Befruz Tasbas, Alain Duvallet, Sinan Goktepeli 2017-12-05
6175261 Fuse cell for on-chip trimming Rajagopal Sundararaman, Geert DeVeirman, Jay Standiford, Michael J. McNutt 2001-01-16