SW

Simon Edward Willard

PS Psemi: 53 patents #5 of 166Top 4%
PS Peregrine Semiconductor: 5 patents #29 of 112Top 30%
MC Murata Manufacturing Co.: 3 patents #2,166 of 5,295Top 45%
TI Texas Instruments: 1 patents #7,357 of 12,488Top 60%
📍 San Diego, CA: #498 of 23,606 inventorsTop 3%
🗺 California: #5,467 of 386,348 inventorsTop 2%
Overall (All Time): #36,219 of 4,157,543Top 1%
62
Patents All Time

Issued Patents All Time

Showing 26–50 of 62 patents

Patent #TitleCo-InventorsDate
11335704 Low parasitic capacitance RF transistors Abhijeet Paul, Alain Duvallet, Ronald E. Reedy 2022-05-17
11329642 Bypass circuitry to improve switching speed Ravindranath Shrivastava, Peter Bacon 2022-05-10
11251140 Transient stabilized SOI FETs Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta 2022-02-15
11190139 Gate drivers for stacked transistor amplifiers Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff 2021-11-30
11049855 Tunable capacitive compensation for RF switch FET stacks Eric S. Shapiro, Tero Tapio Ranta 2021-06-29
11018662 AC coupling modules for bias ladders Tero Tapio Ranta 2021-05-25
10985183 Butted body contact for SOI transistor 2021-04-20
10971359 Managed substrate effects for stabilized SOI FETs Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta 2021-04-06
10923592 High voltage switching device Abhijeet Paul, Alain Duvallet 2021-02-16
10886911 Stacked FET switch bias ladders Tero Tapio Ranta, Matt Allison, Shashi Ketan Samal 2021-01-05
10862473 Positive logic switch with selectable DC blocking circuit Tero Tapio Ranta 2020-12-08
10784818 Body tie optimization for stacked transistor amplifier Chris Olson, Tero Tapio Ranta 2020-09-22
10770480 Systems, methods, and apparatus for enabling high voltage circuits Buddhika Abesingha, Alain Duvallet, Merlin Green, Sivakumar KUMARASAMY 2020-09-08
10763257 S-contact for SOI Befruz Tasbas, Alain Duvallet, Sinan Goktepeli 2020-09-01
10756166 Low leakage FET Abhijeet Paul, Alain Duvallet 2020-08-25
10700642 Gate drivers for stacked transistor amplifiers Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff 2020-06-30
10672726 Transient stabilized SOI FETs Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta 2020-06-02
10629621 Butted body contact for SOI transistor 2020-04-21
10630280 AC coupling modules for bias ladders Tero Tapio Ranta 2020-04-21
10546747 Managed substrate effects for stabilized SOI FETs Robert Mark Englekirk, Keith Bargroff, Christopher C. Murphy, Tero Tapio Ranta 2020-01-28
10505530 Positive logic switch with selectable DC blocking circuit Tero Tapio Ranta 2019-12-10
10475720 S-contact thermal structure with active circuitry Tero Tapio Ranta 2019-11-12
10438950 S-contact for SOI Befruz Tasbas, Alain Duvallet, Sinan Goktepeli 2019-10-08
10389306 Gate drivers for stacked transistor amplifiers Poojan Wagh, Kashish Pal, Robert Mark Englekirk, Tero Tapio Ranta, Keith Bargroff 2019-08-20
10367453 Body tie optimization for stacked transistor amplifier Chris Olson, Tero Tapio Ranta 2019-07-30