Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6581130 | Dynamic remapping of address registers for address translation between multiple busses | Hubert E. Brinkmann | 2003-06-17 |
| 6370611 | Raid XOR operations to synchronous DRAM using a read buffer and pipelining of synchronous DRAM burst read data | William C. Galloway, Christopher Garza, Albert Chang | 2002-04-09 |
| 6370616 | Memory interface controller for datum raid operations with a datum multiplier | Christopher Garza, Albert Chang, Hubert E. Brinkman | 2002-04-09 |
| 5970236 | Circuit for selectively performing data format conversion | William C. Galloway | 1999-10-19 |
| 5867675 | Apparatus and method for combining data streams with programmable wait states | Lawrence W Lomelino | 1999-02-02 |
| 5809280 | Adaptive ahead FIFO with LRU replacement | Gary F. Chard, William C. Galloway | 1998-09-15 |
| 5771359 | Bridge having a data buffer for each bus master | William C. Galloway, Gregory T. Chandler | 1998-06-23 |
| 5737744 | Disk array controller for performing exclusive or operations | Gary F. Chard | 1998-04-07 |
| 5721839 | Apparatus and method for synchronously providing a fullness indication of a dual ported buffer situated between two asynchronous buses | Gregory T. Chandler | 1998-02-24 |
| 5586248 | Disk drive controller with a posted write cache memory | Dennis J. Alexander, Ralph S. Perry | 1996-12-17 |
| 5469548 | Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement | Gregory T. Chandler, Thomas W. Grieff | 1995-11-21 |
| 5448709 | Disk array controller having command descriptor blocks utilized by bus master and bus slave for respectively performing data transfer operations | Gregory T. Chandler, Thomas W. Grieff | 1995-09-05 |
| 5241630 | Device controller with a separate command path between a host and the device and a separate data path including a first in, first out memory between the host and the device | Thomas W. Lattin, Jr., Thomas W. Grieff | 1993-08-31 |
| 5206943 | Disk array controller with parity capabilities | Thomas W. Grieff, Kenneth L. Bush | 1993-04-27 |