Issued Patents All Time
Showing 25 most recent of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12199694 | Data transmission via power line | Suzanne Mary Vining, Win Naing Maung, Mark Alan McAdams | 2025-01-14 |
| 11809348 | Digital bus activity monitor | Tpinn Ronnie Koh, Harshil Atulkumar Shah | 2023-11-07 |
| 11791863 | Data transmission via power line | Suzanne Mary Vining, Win Naing Maung, Mark Alan McAdams | 2023-10-17 |
| 11616438 | Controlled slew rate current limited ramp down voltage control | Ariel Dario Moctezuma, Hasibur Rahman | 2023-03-28 |
| 11476761 | Single-input multiple-output (SIMO) converter having a controller with switchable rest states | Ariel Dario Moctezuma, Hasibur Rahman, Alex Kwasi Nyavor Titriku, Srinath Hosur | 2022-10-18 |
| 11436170 | Digital bus activity monitor | Tpinn Ronnie Koh, Harshil Atulkumar Shah | 2022-09-06 |
| 11372798 | Methods and apparatus to transition devices between operational states | Chung San Roger Chan, T-Pinn R. Koh, Bennett Lau, Adam Rappoport | 2022-06-28 |
| 11265009 | Waveform synthesizer using multiple digital-to-analog converters | Keliu Shu, William R. Krenik | 2022-03-01 |
| 11133841 | Data transmission via power line | Suzanne Mary Vining, Win Naing Maung, Mark Alan McAdams | 2021-09-28 |
| 10795850 | Methods and apparatus to transition devices between operational states | Chung San Roger Chan, T-Pinn R. Koh, Bennett Lau, Adam Rappoport | 2020-10-06 |
| 10770971 | Single-input multiple-output (SIMO) converter having a controller with switchable rest states | Ariel Dario Moctezuma, Hasibur Rahman, Alex Kwasi Nyavor Titriku, Srinath Hosur | 2020-09-08 |
| 10664424 | Digital bus activity monitor | Tpinn Ronnie Koh, Harshil Atulkumar Shah | 2020-05-26 |
| 9621304 | Self-learning and self-correcting decoding of BMC encoded signal | Erick Omar Torres, Karan S. Jain | 2017-04-11 |
| 8581629 | Synchronous state machine with an aperiodic clock | Scott Morrison, Susan A. Curtis, Daniel A. King | 2013-11-12 |
| 8326364 | High resolution, low power design for CPRI/OBSAI latency measurement | T-Pinn R. Koh, Yilun Wang | 2012-12-04 |
| 8291254 | High speed digital bit stream automatic rate sense detection | T-Pinn R. Koh | 2012-10-16 |
| 8228797 | System and method for providing optimum bandwidth utilization | Robert Haskell Utley | 2012-07-24 |
| 8013763 | Method and apparatus for unit interval calculation | T-Pinn R. Koh | 2011-09-06 |
| 7934113 | Self-clearing asynchronous interrupt edge detect latching register | Yilun Wang, T-Pinn R. Koh | 2011-04-26 |
| 7876242 | Method and apparatus for unit interval calculation of displayport auxilliary channel without CDR | T-Pinn R. Koh | 2011-01-25 |
| 7298302 | System and method for presenting serial drive signals for effecting communication of a plurality of parallel data signals | T-Pinn R. Koh | 2007-11-20 |
| 7139988 | Modeling metastability in circuit design | Osman Koyuncu, T-Pinn R. Koh, Steve Dondershine | 2006-11-21 |
| 7130984 | First-in first-out memory system with shift register fill indication | Osman Koyuncu, T-Pinn R. Koh, Christopher Adam Opoczynski | 2006-10-31 |
| 6996015 | First-in first-out memory system with single bit collision detection | T-Pinn R. Koh, Osman Koyuncu | 2006-02-07 |
| 6721937 | Method and system for automated processor register instantiation | Christopher Adam Opoczynski, T-Pinn R. Koh | 2004-04-13 |