Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7752360 | Method and system to map virtual PCIe I/O devices and resources to a standard I/O bus | — | 2010-07-06 |
| 7478137 | Lightweight messaging with and without hardware guarantees | Stephen Paul Belair, Pradeep Kumar Kathail, David Delano Ward | 2009-01-13 |
| 7304999 | Methods and apparatus for processing packets including distributing packets across multiple packet processing engines and gathering the processed packets from the processing engines | Vitaly Sukonik, Michael Laor, Moshe Voloshin, William N. Eatherton, Rami Zemach +1 more | 2007-12-04 |
| 6788689 | Route scheduling of packet streams to achieve bounded delay in a packet switching system | Jonathan S. Turner | 2004-09-07 |
| 6654342 | Accumulating and distributing flow control information via update messages and piggybacked flow control information in other messages in a packet switching system | Zubin Dittia, William N. Eatherton, John Andrew Fingerhut, Jonathan S. Turner | 2003-11-25 |
| 6651157 | Multi-processor system and method of accessing data therein | Jeffrey S. Kuskin | 2003-11-18 |
| 6529570 | Data synchronizer for a multiple rate clock source and method thereof | Steven C. Miller, David Parry, Jon C. Gibbons | 2003-03-04 |
| 6230252 | Hybrid hypercube/torus architecture | Randal S. Passint, Greg Thorson | 2001-05-08 |
| 6101181 | Virtual channel assignment in large torus systems | Randal S. Passint, Greg Thorson | 2000-08-08 |
| 5970232 | Router table lookup mechanism | Randal S. Passint, Greg Thorson | 1999-10-19 |
| 5768529 | System and method for the synchronous transmission of data in a communication network utilizing a source clock signal to latch serial data into first registers and a handshake signal to latch parallel data into second registers | Ronald E. Nikel, Daniel E. Lenoski | 1998-06-16 |
| 5721819 | Programmable, distributed network routing | Robert E. Newhall | 1998-02-24 |
| 5682479 | System and method for network exploration and access | Robert E. Newhall | 1997-10-28 |
| 5669008 | Hierarchical fat hypercube architecture for parallel processing systems | Daniel E. Lenoski | 1997-09-16 |
| 5664151 | System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions | Martin M. Deneroff | 1997-09-02 |
| 5655102 | System and method for piggybacking of read responses on a shared memory multiprocessor bus | — | 1997-08-05 |
| 5504874 | System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions | Martin M. Deneroff | 1996-04-02 |