ML

Michael Laor

CI Cisco: 15 patents #854 of 13,007Top 7%
CS Compass Electro Optical Systems: 4 patents #6 of 22Top 30%
Oracle: 1 patents #8,282 of 14,854Top 60%
Overall (All Time): #223,701 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9363173 Router and switch architecture Eyal Oren, Vladimir Miliavsky 2016-06-07
9304272 EO device for processing data signals Michael Mesh 2016-04-05
8665875 Pipelined packet switching and queuing architecture Garry P. Epps 2014-03-04
8392487 Programmable matrix processor Michael Mesh, Alexander M. Zeltser 2013-03-05
8325403 Optical programmable matrix processor Michael Mesh, Alexander M. Zeltser 2012-12-04
8018937 Pipelined packet switching and queuing architecture Garry P. Epps 2011-09-13
7675926 Hierarchical QoS behavioral model Robert Olsen, Clarence Filsfils 2010-03-09
7643486 Pipelined packet switching and queuing architecture David Belz, Garry P. Epps, Eyal Oren 2010-01-05
7554907 High-speed hardware implementation of RED congestion control algorithm Garry P. Epps 2009-06-30
7304999 Methods and apparatus for processing packets including distributing packets across multiple packet processing engines and gathering the processed packets from the processing engines Vitaly Sukonik, Michael B. Galles, Moshe Voloshin, William N. Eatherton, Rami Zemach +1 more 2007-12-04
7286525 Synchronous pipelined switch using serial transmission Garry P. Epps 2007-10-23
6980552 Pipelined packet switching and queuing architecture David Belz, Garry P. Epps, Eyal Oren 2005-12-27
6977930 Pipelined packet switching and queuing architecture Garry P. Epps 2005-12-20
6831923 Pipelined multiple issue packet switch Martin Cieslak 2004-12-14
6813243 High-speed hardware implementation of red congestion control algorithm Garry P. Epps 2004-11-02
6778546 High-speed hardware implementation of MDRR algorithm over a large number of queues Garry P. Epps 2004-08-17
6731644 Flexible DMA engine for packet header modification Garry P. Epps 2004-05-04
6721316 Flexible engine and data structure for packet header processing Garry P. Epps 2004-04-13
6424649 Synchronous pipelined switch using serial transmission Garry P. Epps 2002-07-23
6147996 Pipelined multiple issue packet switch Martin Cieslak 2000-11-14