Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Non-local error detection in processor systems

Non-local error detection in processor systems

US Patent 9928135 · Granted Mar 27, 2018

Estimated economic value: $2,459,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Vector test decimal instruction for validity testing2025
Hardware-based implementation of secure hash algorithms2025
Hardware-based message block padding for hash algorithms2025
Rounding hexadecimal floating point numbers using binary incrementors2025
Verifying the correctness of a leading zero counter2024
Updating metadata prediction tables using a reprediction pipeline2024
Repurposed hexadecimal floating point data path2024
Enhanced low precision binary floating-point formatting2023
Compute array of a processor with mixed-precision numerical linear algebra suppo2023
Instruction handling for accumulation of register results in a microprocessor2023
Host synchronized autonomous data chip address sequencer for a distributed buffe2023
Vector convert hexadecimal floating point to scaled decimal instruction2023