Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of forming internal dielectric spacers for horizontal nanosheet FET architectures

Method of forming internal dielectric spacers for horizontal nanosheet FET architectures

US Patent 9905672 · Granted Feb 27, 2018

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Augmented reality devices for patients with retinitis pigmentosa and macular deg2025
High-density neuromorphic computing element2025
High-density neuromorphic computing element2025
Monolithic multi-bit weight cell for neuromorphic computing2025
Integrated circuit with buried power rail and methods of manufacturing the same2025
Integrated circuit with buried power rail and methods of manufacturing the same2025
Semiconductor cell blocks having non-integer multiple of cell heights2024
Semiconductor cell blocks having non-integer multiple of cell heights2024
Semiconductor cell blocks having non-integer multiple of cell heights2024
High-density neuromorphic computing element2024
High-density neuromorphic computing element2024
Method of enabling sparse neural networks on memresistive accelerators2023