Assignee
Inventors
- Scott E. Sills (236 patents)
- Durai Vishak Nirmal Ramaswamy (237 patents)
{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Memory cell, an array of memory cells individually comprising a capacitor and a transistor with the array comprising rows of access lines and columns of digit lines, a 2T-1C memory cell, and methods of forming an array of capacitors and access transistors there-above", "item": "https://www.patentleaderboard.com/patent/9842839"}]}
Skip to contentUS Patent 9842839 · Granted Dec 12, 2017