{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Memory cell imprint avoidance", "item": "https://www.patentleaderboard.com/patent/9721639"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Memory cell imprint avoidance

Memory cell imprint avoidance

US Patent 9721639 · Granted Aug 1, 2017

Estimated economic value: $20,356,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Counter-based sense amplifier method for memory cells2025
Counter-based methods and systems for accessing memory cells2025
Memory array seasoning2025
Threshold compensated detector for memory sense2025
Memory device having tiers of 2-transistor memory cells2025
Ferroelectric transistors and assemblies comprising ferroelectric transistors2025
Transistor configurations for vertical memory arrays2025
Memory device having shared read/write data line for 2-transistor vertical memor2025
Memory device having 2-transistor vertical memory cell and shared channel region2025
Differential storage in memory arrays2025
Differential storage in memory arrays2025
Parallel access in a memory array2025