Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for read assist to achieve robust static random access memory (SRAM)

Method and apparatus for read assist to achieve robust static random access memory (SRAM)

US Patent 9697889 · Granted Jul 4, 2017

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Distributed global-bitline keeper/precharge/header circuit for low voltage opera2019
System and method for providing an area efficient and design rule check (DRC) fr2018
Dual supply memory2017
Static random access memory with bitline boost2016
Integrated clock gater (ICG) using clock cascode complimentary switch logic2016
Voltage level shifter and systems implementing the same2016
SRAM wordline driver supply block with multiple modes2016
Semiconductor circuit2016
Integrated clock gater (ICG) using clock cascode complimentary switch logic2015
Flip-flop having shared feedback and method of operation2015
Memory management unit tag memory2015
Integrated clock gater (ICG) using clock cascode complimentary switch logic2015