Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Configuration of gate to drain (GD) clamp and ESD protection circuit for power device breakdown protection

Configuration of gate to drain (GD) clamp and ESD protection circuit for power device breakdown protection

US Patent 9620498 · Granted Apr 11, 2017

Estimated economic value: $1,058,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Reusable wide bandgap semiconductor substrate2023
Sawtooh electric field drift region structure for planar and trench power semico2023
Schottky diode integrated into superjunction power MOSFETs2022
Double-sided chip stack assembly2021
Sawtooh electric field drift region structure for planar and trench power semico2021
MOS device with island region2021
Device structure and manufacturing method using HDP deposited source-body implan2021
Reusable wide bandgap semiconductor substrate2020
Schottky diode integrated into superjunction power MOSFETs2020
Vertical trench DMOSFET having integrated implants forming enhancement diodes in2020
Nano-tube MOSFET technology and devices2020
Nano-tube MOSFET technology and devices2020