Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Increased refresh interval and energy efficiency in a DRAM

Increased refresh interval and energy efficiency in a DRAM

US Patent 9564202 · Granted Feb 7, 2017

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Methods of crash recovery for data stored in non-volatile main memory2022
Cache partitioning in a multicore processor2021
Core prioritization for heterogeneous on-chip networks2019
Circuit switch pre-reservation in an on-chip network2019
Increased refresh interval and energy efficiency in a DRAM2019
Cache partitioning in a multicore processor2019
Thread and data assignment in multi-core processors based on cache miss data and2019
Methods and systems for dynamic DRAM cache sizing2019
Magnetoresistive random-access memory cache write management2018
Hardware-based array compression2018
Energy-efficient dynamic dram cache sizing via selective refresh of a cache in a2018
Memory allocation accelerator2018