Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for improved accuracy of a substrate parasitic-resistance extraction in a circuit simulation

Method for improved accuracy of a substrate parasitic-resistance extraction in a circuit simulation

US Patent 9405873 · Granted Aug 2, 2016

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Net list producing device producing a net list with an interconnection parasitic2011
Semiconductor device, method of manufacture thereof and semiconductor integrated2008
Net list producing device producing a net list with an interconnection parasitic2008
Capacitance measurement circuit2007
Semiconductor device2006
Semiconductor circuit extraction apparatus and method2004
Circuit design method and circuit design apparatus2003
Semiconductor device having a library of standard cells and method of designing 2003
Clock signal analysis device and clock signal analysis method2002