{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Apparatuses and methods for performing multiple memory operations", "item": "https://www.patentleaderboard.com/patent/9384830"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatuses and methods for performing multiple memory operations

Apparatuses and methods for performing multiple memory operations

US Patent 9384830 · Granted Jul 5, 2016

Estimated economic value: $11,715,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Memory failure prediction and mitigation2025
Host controlled electronic device testing2025
Variable page size architecture2025
Host controlled media testing of memory2025
Accessing memory cells in a vertical memory array2025
Memory bank protection2025
Memory address translation for data protection and recovery2025
Command queuing2025
Multiply operation circuit, multiply and accumulate circuit, and methods thereof2025
Built-in self-test circuitry2025
Memory activation timing management2025
Built-in self-test burst patterns based on architecture of memory2025