Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for fabricating a transistor with reduced junction leakage current

Method for fabricating a transistor with reduced junction leakage current

US Patent 9368624 · Granted Jun 14, 2016

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Integrated circuit interconnect structures with a metal chalcogenide liner2025
Evaporation-based sample preparation workflow for mass spectrometry2025
Package architecture of photonic system with vertically stacked dies having plan2025
Package architecture of scalable compute wall having compute bricks with vertica2025
Performing distributed processing using distributed memory2025
Embedded dynamic random-access memory (eDRAM) to operate based on data access ch2025
Large ship security management system2025
Integrated circuit structures having ultra-high conductivity global routing2025
Semiconductor layout in FinFET technologies2025
Providing fine grain access to package memory2025
Benzylpyridinium reagent for mass spectrometry2025
Semiconductor device2025