Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor devices having stressor regions and related fabrication methods

Semiconductor devices having stressor regions and related fabrication methods

US Patent 9269710 · Granted Feb 23, 2016

Estimated economic value: $655,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Self-aligned silicidation for replacement gate process2014
Self-aligned silicidation for replacement gate process2014
Electronic device and method of biasing2014
Method of fabricating multi-fingered semiconductor devices on a common substrate2013
Semiconductor devices having stressor regions and related fabrication methods2013
Semiconductor devices having stressor regions and related fabrication methods2013
Transistor with asymmetric silicon germanium source region2013
Self-aligned silicidation for replacement gate process2013
Self-aligned silicidation for replacement gate process2013
Semiconductor device and methods for fabricating same2011
Transistor with asymmetric silicon germanium source region2011
Compensating for layout dimension effects in semiconductor device modeling2010