Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Reducing power consumption in a fused multiply-add (FMA) unit responsive to input data values

Reducing power consumption in a fused multiply-add (FMA) unit responsive to input data values

US Patent 9152382 · Granted Oct 6, 2015

Estimated economic value: $14,030,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Remote cache invalidation2025
Coalescing adjacent gather/scatter operations2025
Apparatuses and methods to accelerate matrix multiplication2025
Apparatuses and methods to accelerate matrix multiplication2025
Systems, methods, and apparatuses for heterogeneous computing2024
Systems, methods, and apparatuses for heterogeneous computing2024
Vector friendly instruction format and execution thereof2024
Systems, apparatuses, and methods for chained fused multiply add2024
Systems, apparatuses, and methods for chained fused multiply add2024
Vector friendly instruction format and execution thereof2023
Systems, methods, and apparatuses for heterogeneous computing2023
Systems, methods, and apparatuses for heterogeneous computing2023