Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuits configured to remain in a non-program state during a power-down event

Circuits configured to remain in a non-program state during a power-down event

US Patent 8599597 · Granted Dec 3, 2013

Estimated economic value: $8,275,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

High-speed and area-efficient parallel-write-and-read memory2025
Memory with bitcell power boosting2024
Memory with double redundancy2024
Memory with a sense amplifier isolation scheme for enhancing memory read bandwid2024
Memory with reduced capacitance at a sense amplifier2023
SRAM with scan mode2023
Memory with single-ended sensing using reset-set latch2023
Joint electron devices engineering council (JESD)204-to-peripheral component int2023
Memory device with built-in flexible double redundancy2023
Memory with positively boosted write multiplexer2023
System reference (SYSREF) signal system and method2022
Systems and methods for driving wordlines using set-reset latches2022