Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Boosted gate voltage programming for spin-torque MRAM array

Boosted gate voltage programming for spin-torque MRAM array

US Patent 8248841 · Granted Aug 21, 2012

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Massively independent testers system2024
Hair cutting device adapted for cutting one's own hair2022
Method and apparatus for scrubbing accumulated data errors from a memory system2015
Method and apparatus for scrubbing accumulated disturb data errors in an array o2014
Shared bit line SMT MRAM array with shunting transistors between bit lines2014
Shared bit line SMT MRAM array with shunting transistors between bit lines2013
Shared bit line SMT MRAM array with shunting transistors between bit lines2013
Shared bit line SMT MRAM array with shunting transistors between bit lines2013
Shared bit line SMT MRAM array with shunting transistors between the bit lines2013
Read disturb free SMT MRAM reference cell circuit2012
Gate drive voltage boost schemes for memory array2011
Magnetic memory capable of minimizing gate voltage stress in unselected memory c2011