Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method for integrated circuit fabrication using pitch multiplication

Method for integrated circuit fabrication using pitch multiplication

US Patent 8216949 · Granted Jul 10, 2012

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Pitch reduction technology using alternating spacer depositions during the forma2025
Methods of forming electronic devices using pitch reduction2025
Methods of forming nanostructures utilizing self-assembled nucleic acids2025
Method of forming photonics structures2025
String driver assemblies including two-dimensional materials, and related memory2025
Epitaxial single crystalline silicon growth for a horizontal access device2025
Memory having a continuous channel2025
Memory array and methods used in forming a memory array2025
Driver placement in memories having stacked memory arrays2025
Memory circuitry comprising a vertical string of memory cells and a conductive v2024
Methods of forming electronic devices2024
Electronic devices including a seed region and magnetic regions2024