Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Calibrating a phase detector and analog-to-digital converter offset and gain

Calibrating a phase detector and analog-to-digital converter offset and gain

US Patent 8130888 · Granted Mar 6, 2012

Estimated economic value: $2,804,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Fail safe clock buffer and clock generator2019
Higher-order phase noise modulator to reduce spurs and quantization noise2015
Cascaded PLL for reducing low-frequency drift in holdover mode2014
Interpolative divider linearity enhancement techniques2014
Mutual inductance circuits2014
Sigma-delta modulation with reduction of spurs using a dither signal2013
PLL using interpolative divider as digitally controlled oscillator2013
Variable sense level for fuse-based non-volatile memory2010
Calibrating a phase detector and analog-to-digital converter offset and gain2009
Calibrating a phase detector and analog-to-digital converter offset and gain2009
Calibrating a phase detector and analog-to-digital converter offset and gain2009
Reducing phase offsets in a phase detector2009