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Home › Semiconductor die structures for wafer-level chipscale packaging of power devices, packages and systems for using the same, and methods of making the same

Semiconductor die structures for wafer-level chipscale packaging of power devices, packages and systems for using the same, and methods of making the same

US Patent 8058732 · Granted Nov 15, 2011

Estimated economic value: $7,435,000 ⓘ

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