Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Configuration of shared tester channels to avoid electrical connections across die area boundary on a wafer

Configuration of shared tester channels to avoid electrical connections across die area boundary on a wafer

US Patent 7893700 · Granted Feb 22, 2011

Estimated economic value: $2,854,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Increasing thermal isolation of a probe card assembly2012
Configurable field device for use in process automation systems2012
Sequentially configurable programmable integrated circuit2011
Probe card assembly for electronic device testing with DC test resource sharing2011
Electronic circuit or board tester and method of testing an electronic device1997