Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of forming fin structures using a sacrificial etch stop layer on bulk semiconductor material

Method of forming fin structures using a sacrificial etch stop layer on bulk semiconductor material

US Patent 7871873 · Granted Jan 18, 2011

Estimated economic value: $6,681,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Negative capacitance matching in gate electrode structures2019
Negative capacitance matching in gate electrode structures2018
Fin-FET resonant body transistor2018
Methods to utilize piezoelectric materials as gate dielectric in high frequency 2018
Fin-FET resonant body transistor2018
III-V NFETs including channel barrier layers to reduce band-to-band leakage curr2017
Methods to utilize piezoelectric materials as gate dielectric in high frequency 2017
MEMs-based resonant FinFET2017
Methods of forming low defect replacement fins for a FinFET semiconductor device2017
Methods of forming different FinFET devices with different threshold voltages an2017
Channel cladding last process flow for forming a channel region on a FinFET devi2016
Semiconductor device having structure with fractional dimension of the minimum d2016