Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › System, method and storage medium for a memory subsystem with positional read data latency

System, method and storage medium for a memory subsystem with positional read data latency

US Patent 7512762 · Granted Mar 31, 2009

Estimated economic value: $5,042,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Efficient and selective sparing of bits in memory systems2023
Method and apparatus to reduce bandwidth overhead of CRC protection on a memory 2023
Hybrid memory mirroring using storage class memory2023
Address/command chip controlled data chip address sequencing for a distributed m2023
Redundant voltage regulator for memory devices2022
Method and apparatus to reduce bandwidth overhead of CRC protection on a memory 2021
Efficient and selective sparing of bits in memory systems2021
Pattern recognition for proactive treatment of non-contiguous growing defects2021
Using dual channel memory as single channel memory with spares2021
Tracking address ranges for computer memory errors2021
Performing error correction in computer memory2021
Redundant voltage regulator for memory devices2021