Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Computer system with a debug facility for a pipelined processor using predicated execution

Computer system with a debug facility for a pipelined processor using predicated execution

US Patent 7441109 · Granted Oct 21, 2008

Estimated economic value: $6,125,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Configuration switch triggers for audio device communications2025
Low-latency parameter updates for extended personal area networks2024
Seamless transitions between media modes2024
Stream conformant bit error resilience2023
Spatial audio data exchange2022
Stream conformant bit error resilience2022
Application directed latency control for wireless audio streaming2021
Media access controller with a codec error model2021
Quantization codeword selection for low cost parity checking2021
Error resiliency for entropy coded audio data2020
Low-latency audio streaming with communication coexistence2020
Reduced latency media distribution system2017