Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12395864 | Configuration switch triggers for audio device communications | Ahmed Ragab Elsherif, Benjamin Campbell, Derrick C. Lin, Srikant Kuppa | 2025-08-19 |
| 12107910 | Low-latency parameter updates for extended personal area networks | Ahmed Ragab Elsherif, Richard Turner | 2024-10-01 |
| 12003563 | Seamless transitions between media modes | Richard Turner, Derrick Rea, Raghavendra Bhat Noojady Krishna, Bharath Kumar Tirunagaru | 2024-06-04 |
| 11823692 | Stream conformant bit error resilience | Richard Turner, Megan Lucy Taggart, Justin Hundt | 2023-11-21 |
| 11477600 | Spatial audio data exchange | Richard Turner, Benjamin Campbell | 2022-10-18 |
| 11348594 | Stream conformant bit error resilience | Richard Turner, Megan Lucy Taggart, Justin Hundt | 2022-05-31 |
| 11176956 | Application directed latency control for wireless audio streaming | John Oliver, Richard Turner, Gary Sands, Justin Hundt | 2021-11-16 |
| 11121820 | Media access controller with a codec error model | Joel Benjamin Linsky, Richard Turner | 2021-09-14 |
| 11095311 | Quantization codeword selection for low cost parity checking | Richard Turner, Joel Benjamin Linsky | 2021-08-17 |
| 10727858 | Error resiliency for entropy coded audio data | Richard Turner, Justin Hundt, Gary Sands | 2020-07-28 |
| 10616743 | Low-latency audio streaming with communication coexistence | Richard Turner, Eric Tsou, Nachiket Shankar Deshpande, Olaf Hirsch | 2020-04-07 |
| 9621682 | Reduced latency media distribution system | Richard Turner | 2017-04-11 |
| 9060183 | Reduced latency media distribution system | Richard Turner | 2015-06-16 |
| 7441109 | Computer system with a debug facility for a pipelined processor using predicated execution | Andrew Cofler, Isabelle Sename | 2008-10-21 |
| 7240185 | Computer system with two debug watch modes for controlling execution of guarded instructions upon breakpoint detection | Andrew Cofler, Isabelle Sename | 2007-07-03 |
| 7013256 | Computer system with debug facility | Andrew Cofler, Arnaud Dehamel, Isabelle Sename | 2006-03-14 |
| 6959379 | Multiple execution of instruction loops within a processor without accessing program memory | Andrew Cofler | 2005-10-25 |
| 6889313 | Selection of decoder output from two different length instruction decoders | Andrew Cofler, Stéphane Bouvier | 2005-05-03 |
| 6832334 | Computer register watch | Isabelle Sename, Stéphane Bouvier | 2004-12-14 |
| 6742131 | Instruction supply mechanism | Andrew Cofler | 2004-05-25 |
| 6718452 | Storage array supporting a plurality of instruction modes | Sonia Ferrante | 2004-04-06 |
| 6711668 | Prefetch unit | Andrew Cofler | 2004-03-23 |
| 6678818 | Decoding next instruction of different length without length mode indicator change upon length change instruction detection | Andrew Cofler, Stéphane Bouvier | 2004-01-13 |