Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Chip development system enabled for the handling of multi-level circuit design data

Chip development system enabled for the handling of multi-level circuit design data

US Patent 7421670 · Granted Sep 2, 2008

Estimated economic value: $2,831,000 ⓘ

Assignee

No assignee recorded.

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method for recognizing and verifying FIFO structures in integrated circuit desig2009
Method for clock synchronization validation in integrated circuit design2009
Pattern recognition in an integrated circuit design2007
Method for clock synchronization validation in integrated circuit design2006
Apparatus and method for handling of multi-level circuit design data2006
Circuit tester1991
Method of checking collinearity1989
Steering means for, and in combination with, an articulated _vehicle1985