Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Apparatus for statistical LSI delay simulation

Apparatus for statistical LSI delay simulation

US Patent 7239997 · Granted Jul 3, 2007

Estimated economic value: $270,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Timing verification method for semiconductor integrated circuit2007
Timing analysis method and apparatus2007
Method for setting design margin for LSI2007
Method for evaluating property of integrated circuitry2005
Apparatus and method for calculating temporal deterioration margin amount of LSI2004
Hot carrier effect simulation for integrated circuits2001
Apparatus and method for extracting circuit, system and method for generating in2001
Apparatus and method of LSI timing degradation simulation1999
Processor utilizing a low voltage data circuit and a high voltage controller1997
Semiconductor device having combined fully associative memories1995
Memory device having address translator and comparator for comparing memory cell1995