Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Technique for incorporating power information in register transfer logic design

Technique for incorporating power information in register transfer logic design

US Patent 7146303 · Granted Dec 5, 2006

Estimated economic value: $9,333,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Method and system for performing distributed timing signoff and optimization2017
Transmitter compensation2009
Methods and apparatus for equalization in single-ended chip-to-chip communicatio2008
Fully stable clock domain synchronization technique for input/output data transm2008
Simultaneous multi-band transmission on a printed circuit board2008
Logically partitioning different classes of TLB entries within a single caching 2007
Dynamic calibration of I/O power supply level2007
Method and apparatus for receiver circuit tuning2007
Impedance controlled transmitter with adaptive compensation for chip-to-chip com2007
Receiver-side adaptive equalization in source-synchronous chip-to-chip communica2006
Technique to enlarge data eyes in wireline communication systems2006
I/O resonance cancellation circuit based on charge-pumped capacitors2006