Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Semiconductor package with circuit side polymer layer and wafer level fabrication method

Semiconductor package with circuit side polymer layer and wafer level fabrication method

US Patent 6995041 · Granted Feb 7, 2006

Estimated economic value: $2,952,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor components having conductive vias with aligned back side conductor2025
Blood pressure monitoring system including a liquid filled sensor2025
Packaged integrated circuit devices with through-body conductive vias, and metho2024
Optical sensor package with magnetic component for device attachment2024
Systems and methods for magnetic barrier assembly2024
Semiconductor components having conductive vias with aligned back side conductor2024
Optoelectronic devices with non-rectangular die shapes2023
Packaged integrated circuit devices with through-body conductive vias, and metho2023
Wearable electronic device with fluid-based pressure sensing2023
Exposed wire-bonding for sensing liquid and water in electronic devices2022
Packaged integrated circuit devices with through-body conductive vias, and metho2022
Packaged microelectronic devices having stacked interconnect elements and method2022